DocumentCode :
3683171
Title :
VFTLP characteristics of ESD protection diodes in advanced bulk FinFET technology
Author :
Shih-Hung Chen;Dimitri Linten;Mirko Scholz;Geert Hellings;Roman Boschke;Guido Groeseneken;Aaron Thean
Author_Institution :
Imec, Kapeldreef 75, B-3001 Leuven, Belgium
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
Beyond 20nm nodes, bulk FinFET is the mainstream technology; however, new process options can result in significant impacts on intrinsic ESD performance. In this work, we study on vfTLP characteristics of two types of ESD diodes. The corresponding TCAD simulations bring an in-depth understanding on the physical mechanism of these ESD diodes.
Keywords :
"Logic gates","Implants","Electrostatic discharges","FinFETs","Layout","Standards","Stress"
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2015 37th
Type :
conf
DOI :
10.1109/EOSESD.2015.7314809
Filename :
7314809
Link To Document :
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