• DocumentCode
    3685314
  • Title

    SoC-based architecture for biomedical signal processing

  • Author

    R. Gutiérrez-Rivas;A. Hernández;J. J. García;W. Marnane

  • Author_Institution
    Electronics Department from the University of Alcala, Alcala de Henares (Madrid), Spain
  • fYear
    2015
  • Firstpage
    6018
  • Lastpage
    6021
  • Abstract
    Over the last decades, many algorithms have been proposed for processing biomedical signals. Most of these algorithms have been focused on the elimination of noise and artifacts existing in these signals, so they can be used for automatic monitoring and/or diagnosis applications. With regard to remote monitoring, the use of portable devices often requires a reduced number of resources and power consumption, being necessary to reach a trade-off between the accuracy of algorithms and their computational complexity. This paper presents a SoC (System-on-Chip) architecture, based on a FPGA (Field-Programmable Gate Array) device, suitable for the implementation of biomedical signal processing. The proposal has been successfully validated by implementing an efficient QRS complex detector. The results show that, using a reduced amount of resources, values of sensitivity and positive predictive value above 99.49% are achieved, which make the proposed approach suitable for telemedicine applications.
  • Keywords
    "Computer architecture","Electrocardiography","Signal processing algorithms","Field programmable gate arrays","Real-time systems","Heart rate variability","Microprocessors"
  • Publisher
    ieee
  • Conference_Titel
    Engineering in Medicine and Biology Society (EMBC), 2015 37th Annual International Conference of the IEEE
  • ISSN
    1094-687X
  • Electronic_ISBN
    1558-4615
  • Type

    conf

  • DOI
    10.1109/EMBC.2015.7319763
  • Filename
    7319763