DocumentCode
3686065
Title
Investigation of deep level centers in i- and n-layers of GaAs pin - diodes
Author
J. Toompuu;O. Korolkov;N. Sleptsuk;T. Rang
Author_Institution
Thomas Johann Seebeck Department of Electronics, Tallinn University of Technology, Ehitajate tee 5, 19086, Estonia
fYear
2014
Firstpage
25
Lastpage
28
Abstract
This work presents the results of capacitance-voltage (C-V), current-voltage (I-V) and deep level transient spectroscopy (DLTS) on special Schottky diode samples fabricated on the basis of GaAs p+-pin-n+ structure. It is shown that in the i-layer and n-region bordering the i-layer is observed “anomalous” stationary capacitance temperature change. DLTS spectra analysis allowed to identify the electron trap EL2 and to determine its concentration distribution. Suggested a possible interaction of hole traps A and B with the electron traps EL2.
Keywords
"Gallium arsenide","Temperature","Capacitance","Impurities","Capacitance-voltage characteristics","Schottky diodes","Electron traps"
Publisher
ieee
Conference_Titel
Electronic Conference (BEC), 2014 14th Biennial Baltic
Type
conf
DOI
10.1109/BEC.2014.7320547
Filename
7320547
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