Asynchronous sequential circuits synthesis by high-performance computing

The paper deals with asynchronous sequential circuits synthesis based on finite state machine representation at the logical level. A new computer-aided design (CAD) system has been developed using the finite state machine description in VHDL and a new design algorithm for generating a synthesized circuit model in VHDL. The developed CAD system was implemented for the single-processor system and also the high-performance computing system. Effectiveness of the new CAD system was evaluated on the high-performance computing system using different numbers of computational nodes by various types of finite state machines.