DocumentCode
3686078
Title
Extended checkers for Logic-Based Distributed Routing in Network-on-Chips
Author
Behrad Niazmand;Ranganathan Hariharan;Vineeth Govind;Gert Jervan;Thomas Hollstein;Jaan Raik
Author_Institution
Department of Computer Engineering, Tallinn University of Technology, Estonia
fYear
2014
Firstpage
77
Lastpage
80
Abstract
Network on Chips (NoCs) are composed of routers, whose task is to dispatch packets within the communication network according to the routing algorithm implemented. However, the extreme scaling of emerging nanometer technologies makes the routers vulnerable to wear-out and environmental effects. In order to contain this issue, development of online testing capabilities for the NoC routers is a must. This paper proposes concurrent online checkers for structural faults in the NoC routing algorithms utilizing the Logic-Based Distributed Routing (LBDR) concept. We show by fault injection experiments that the fault coverage of existing checking mechanisms for LBDR faults is very low. We propose an extended set of concurrent checkers that increase the coverage more than threefold facilitating detection of the majority of structural faults within the LBDR.
Keywords
"Routing","Circuit faults","Ports (Computers)","Fault detection","Integrated circuit interconnections","Testing","Equivalent circuits"
Publisher
ieee
Conference_Titel
Electronic Conference (BEC), 2014 14th Biennial Baltic
Type
conf
DOI
10.1109/BEC.2014.7320560
Filename
7320560
Link To Document