• DocumentCode
    3687091
  • Title

    Coarse-grain reconfigurable ASIC through multiplexer based switches

  • Author

    Karen Gettings;Marc Burke;Jeremy Muldavin;Michael Vai

  • Author_Institution
    MIT Lincoln Laboratory, Lexington, USA
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    We present an ASIC architecture with coarse-grain reconfigurability that uses accelerators to improve performance over fine-grain reconfigurable architectures. A reconfigurable FFT ASIC was built as a proof of concept, and it successfully demonstrated valid switch operation for reconfiguration.
  • Keywords
    "Application specific integrated circuits","Random access memory","Field programmable gate arrays","Program processors","Kernel","Multiplexing","Clocks"
  • Publisher
    ieee
  • Conference_Titel
    High Performance Extreme Computing Conference (HPEC), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/HPEC.2015.7322438
  • Filename
    7322438
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3687091