DocumentCode :
3687105
Title :
Heterogeneous work-stealing across CPU and DSP cores
Author :
Vivek Kumar;Alina Sbîrlea;Ajay Jayaraj;Zoran Budimlić;Deepak Majeti;Vivek Sarkar
Author_Institution :
Rice University, Houston, Texas 77005, United States
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
Due to the increasing power constraints and higher and higher performance demands, many vendors have shifted their focus from designing high-performance computer nodes using powerful multicore general-purpose CPUs, to nodes containing a smaller number of general-purpose CPUs aided by a larger number of more power-efficient special purpose processing units, such as GPUs, FPGAs or DSPs. While offering a lower power-to-performance ratio, unfortunately, such heterogeneous systems are notoriously hard to program, forcing the users to resort to lower-level direct programming of the special purpose processors and manually managing data transfer and synchronization between the parts of the program running on general-purpose CPUs and on special-purpose processors. In this paper, we present HC-K2H, a programming model and runtime system for the Texas Instruments Keystone II Hawking platform, consisting of 4 ARM CPUs and 8 TI DSP processors. This System-on-a-Chip (SoC) offers high floating-point performance with lower power requirements than other processors with comparable performance. We present the design and implementation of a hybrid programming model and work-stealing runtime that allows tasks to be created and executed on both the ARM and DSP, and enables the seamless execution and synchronization of tasks regardless of whether they are running on the ARM or DSP. The design of our programming model and runtime is based on an extension of the Habanero-C programming system. We evaluate our implementation using task-parallel benchmarks on a Hawking board, and demonstrate excellent scaling compared to sequential implementations on a single ARM processor.
Keywords :
"Digital signal processing","Runtime","Programming","Program processors","Hardware","Benchmark testing","Multicore processing"
Publisher :
ieee
Conference_Titel :
High Performance Extreme Computing Conference (HPEC), 2015 IEEE
Type :
conf
DOI :
10.1109/HPEC.2015.7322452
Filename :
7322452
Link To Document :
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