Influence of channel dopant concentration and temperature on low-voltage VDMOS transistor ON-resistance

In this paper effects of the maximum dopant concentration in the channel region and temperature on the ON-resistance in low-voltage (100 V) power VDMOS transistors are investigated. Besides geometrical parameters, the ON-resistance of low-voltage VDMOS devices is mainly determined by the threshold voltage and carrier mobility values. For that reason, our theoretical considerations involve effects of dopant concentration and temperature changes on both the threshold voltage and carrier mobility behavior. Theoretical predictions for devices with channel dopant concentration in the range from 10/sup 16/ cm/sup -3/ to 10/sup 17/ cm/sup -3/ are compared with experimental measurements at temperatures between 300 K and 473 K.