A Linearity Enhancement Method for CMOS Mixers Using Digital Assist

A technique is presented to improve both the input 1-dB compression point (IP1dB) and the third-order intercept point (IP3) of a mixer using real-time knowledge of the incident RF power to the mixer plus look-up tables (LUTs) that contain measured performance data of mixer under different bias conditions. The concept is applied to an active mixer designed in-house on 130 nm CMOS technology. The mixer has a modified Gilbert-cell topology where the dc bias currents of the RF stage and the LO switching stage are independent of each other. Experimental tests reveal that the IP1dB of the mixer can be increased by +8.7 dB from a baseline value of -12.1 dBm to - 3.3 dBm using the digital assist and its IIP3 can be improved by +5.9 dB from -3.11 dBm to +2.83 dBm with the technique.