DocumentCode
3689040
Title
Analysis of InAs-Si heterojunction double-gate tunnel FETs with vertical tunneling paths
Author
Hamilton Carrillo-Nuñez;Mathieu Luisier;Andreas Schenk
Author_Institution
Integrated Systems Laboratory ETH Zü
fYear
2015
Firstpage
302
Lastpage
305
Abstract
InAs-Si double-gate TFETs exploiting the two-dimensional (2D) density-of-state (DOS) switch are studied. A full-band and atomistic quantum transport simulator based on the sp3d5s* tight-binding model is used to solve the quantum transport problem taking into account both lateral and vertical band-to-band tunneling paths. TFETs with only vertical tunneling components are also investigated. Our findings suggest that InAs-Si 2D-2D TFETs might offer a device solution with both steep sub-thermal sub-threshold swing (SS) and high ON-current. In the best case of an extremely thin InAs-Si 2D-2D TFET the minimal swing reaches SS = 12mV/dec and the ON-current 241 A/m.
Keywords
"Tunneling","Silicon","Switches","Heterojunctions","Logic gates"
Publisher
ieee
Conference_Titel
Solid State Device Research Conference (ESSDERC), 2015 45th European
ISSN
1930-8876
Print_ISBN
978-1-4673-7133-9
Electronic_ISBN
2378-6558
Type
conf
DOI
10.1109/ESSDERC.2015.7324774
Filename
7324774
Link To Document