Adaptive Time-Based Least Memory Intensive Scheduling

DRAM memory is a major resource shared in multi-core system, hence memory requests from different applications interfere with each other. Therefore, different applications running together on the same chip can experience extremely different memory system performance: one application can experience a severe slowdown or starvation while another is unfairly prioritized by the memory scheduler. Existing memory access scheduling techniques try to optimize the overall multi-core system performance and fairness. This paper proposes an effective memory access scheduler, called Adaptive Time-Based Least Memory Intensive scheduling (Adaptive TB-LMI). The goal of the proposed scheduler is to increase the overall system performance and fairness. Adaptive TB-LMI showed an average increase in performance and fairness by 2.5% and 10.2% respectively compared to Time-Based Least Memory Intensive scheduling (TB-LMI) (previous work providing the best system throughput and fairness). Adaptive TB-LMI showed a maximum increase in performance and fairness by 9.65% and 22.16% respectively compared to TB-LMI.