Novel adaptive probing for wafer level chip scale package

To be “More than Moore´s law”, Integrated Fan-Out Wafer-Level Chip-Scale Packaging (InFO WLCSP) is more cost-effective than other 3D-integrated-circuit (3DIC) technologies for consumer mobile, wearable, and “Internet-of-Things” (IoT) markets. To further improve the test quality, yield, and cost of InFO WLCSP by probing copper-pillars without solder-caps, adaptive probing is developed to improve traditional fixed probing recipes. Therefore, variations of copper-pillars, wafer warping, and un-coplanarity of high-pin-count probes can be tolerated. According to the characterizations and experimental results, the analyses, strategies, algorithm, and test programs can improve yield, test time, and probe-card lifetime dramatically. The proposed adaptive probing methods can handle not only the worst varied probing case on copper-pillars but also other critical probing cases.