• DocumentCode
    3692220
  • Title

    FPGA implementation of low-power 3D ultrasound beamformer

  • Author

    Richard Sampson;Ming Yang;Siyuan Wei;Rungroj Jintamethasawat;Brian Fowlkes;Oliver Kripfgans;Chaitali Chakrabarti;Thomas F. Wenisch

  • Author_Institution
    Department of EECS, University of Michigan, USA
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    3D ultrasound is common for non-invasive medical imaging in cardiology and OB-GYN because of its accuracy, safety, and real-time ease of use. However, high bandwidth requirements and extreme computational complexity have precluded hand-held and low-power 3D systems, limiting 3D applications. In previous work, we presented Sonic Millip3De, a hardware design that can efficiently handle the high computational demand of real-time 3D synthetic aperture beamforming, even in handheld and mobile applications. The design combines a custom, highly parallel hardware system with a novel delay approximation method to quickly produce high quality 3D image data within an estimated 15 W full-system power budget. Prior evaluations of the design relied on software prototypes; this work extends previous evaluations with an FPGA implementation of the beamforming accelerator, validating the results of earlier prototypes. In particular, we carry out image quality analyses of our beamforming architecture using simulated 3D echo data (from Field II) and 2D artificial tissue phantom data acquired using a Verasonics V-1 system and Philips P4-1 probe. We compare results from the FPGA implementation to an ideal software beamformer and prior software prototypes of the Sonic Millip3De design.
  • Keywords
    "Three-dimensional displays","Field programmable gate arrays","Array signal processing","Transducers","Ultrasonic imaging","Prototypes","Hardware"
  • Publisher
    ieee
  • Conference_Titel
    Ultrasonics Symposium (IUS), 2015 IEEE International
  • Type

    conf

  • DOI
    10.1109/ULTSYM.2015.0514
  • Filename
    7329210