Title :
FAME: A Fast and Accurate Memory Emulator for New Memory System Architecture Exploration
Author :
Krishna T. Malladi;Mu-Tien Chang;John Ping;Hongzhong Zheng
Abstract :
Memory systems are critical to system responsivenessand operating costs. New memory technologies like PCM, STT-MRAM, RRAM are poised to provide an intermediatememory layer between DRAM and flash to better serve the needs of capacity, latency hungry datacenter applications. To drive their efficient deployment, it is imperative to make complex architectural decisions and justify the need to rethink system design. To assist this, we present FAME: a Fast and Accurate Memory Emulator methodology that combines the speed and accuracy of emulation with the detail of simulation for memory systems. We use QPI FPGA that is mainly used to accelerate computations, in a novel way to bring fast, cache-coherent DRAM emulation to systems that relied only on limited capabilities of simulation and NUMA platforms. Furthermore, we describe an integrated methodology that helps navigate DRAM memory caching and new technologies´ microarchitectural timing simulation. Using FAME, we demonstrate that applications could obtain upto 2-3× system speedup using the new memory system tier.
Keywords :
"Field programmable gate arrays","Random access memory","Emulation","Microarchitecture","Timing","Bandwidth","Benchmark testing"
Conference_Titel :
Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS), 2015 IEEE 23rd International Symposium on
DOI :
10.1109/MASCOTS.2015.21