Energy efficient FFT implementation through stage skipping and merging

Fast Fourier Transform (FFT) implementation is characterized by a large number of memory access operations. For FFTs with a significant number of zeros at the input, commonly found in broadcasting standards, we propose energy optimizations leading to reduced memory accesses. We also present an energy estimate based technique for selecting an energy-efficient Register File size, for implementing FFT in both Single Instruction Multiple Data (SIMD) and non-SIMD architectures. Experimental results for different configurations show a variation of 18.5% to 58.5% in energy consumption across the best and worst choices of RF size in the considered range. The proposed implementation is up to 92% more energy efficient than both the non-optimized and pruned radix-2 FFT implementations.