ATARDS: An adaptive fault-tolerant strategy to cope with massive defects in Network-on-Chip interconnections

The use of embedded fault-tolerant mechanisms in Network-on-Chips (NoCs) has become essential to ensure connectivity in the presence of massive defects, and consequently improving the yield. According to the number of defects and their location in NoC, the fault tolerant techniques can be very expensive in terms of area, performance and energy overhead. The use of testing and diagnosis can help to minimize costs associated to embedded fault tolerant mechanisms because they can be adapted to work only at the defect regions. Our fault tolerant strategy is based on adaptive routing and data splitting to cope with massive defects in NoC interconnections. The combination of these two techniques adds significant improvements in reliability and energy efficiency. Experimental results with random massive interconnection faults have shown that our proposal can still sustain 100% of connectivity with 60% of defected wires. The energy penalty may vary from only 5 to up to 40% as a function of the number of faulty interconnections, which is much less overhead compared to techniques as hamming code.