DocumentCode
3694085
Title
Interval arithmetic based input vector control for RTL subthreshold leakage minimization
Author
Shilpa Pendyala;Srinivas Katkoori
Author_Institution
Computer Science &
fYear
2012
Firstpage
141
Lastpage
146
Abstract
Applying appropriate minimum leakage vector (MLV) to each RTL module instance results in a low leakage state with significant area overhead. For each RTL module, via Monte Carlo simulation, we identify a set of MLV intervals such that maximum leakage is within (say) 10% of the lowest known leakage. We can reduce area overhead by choosing PI MLVs such that resultant inputs to internal nodes are also MLVs. Otherwise, control points can be inserted. Based on interval arithmetic, given a DFG, we propose a heuristic for Primary Input (PI) MLV identification with minimal control points. Experimental results for DSP filters implemented in 16nm technology are promising.
Keywords
"Transistors","Adders","Subthreshold current","Delays","Leakage currents","Minimization","Switching circuits"
Publisher
ieee
Conference_Titel
VLSI and System-on-Chip, 2012 (VLSI-SoC), IEEE/IFIP 20th International Conference on
Print_ISBN
978-1-4673-2658-2
Type
conf
DOI
10.1109/VLSI-SoC.2012.7332091
Filename
7332091
Link To Document