• DocumentCode
    3694113
  • Title

    Low cost adjacent double error correcting code with complete elimination of miscorrection within a dispersion window for Multiple Bit Upset tolerant memory

  • Author

    Avijit Dutta

  • Author_Institution
    Cypress Semiconductor Corp., 9125 SW Gemini Drive #200, Beaverton, OR, USA
  • fYear
    2012
  • Firstpage
    287
  • Lastpage
    290
  • Abstract
    Multiple Bit Upsets (MBUs) have become increasingly more frequent with continued increase in memory density. The existing adjacent error correcting codes suffer from high probability of miscorrection for non-adjacent double errors. Miscorrection of a nonadjacent double error as an adjacent double error can reduce the reliability of the memory incorporating such codes. A constraint driven methodology is proposed here for deriving an error correcting code that can correct all single errors and correct the most likely double bit errors i.e., double adjacent errors in a memory while completely eliminating the miscorrection of the most likely nonadjacent double errors. The check bit overhead is minimal and comparable to SEC-DED and SEC-DAEC codes. The encoding and decoding schemes along with the associated hardware for the proposed code are also presented.
  • Keywords
    "Error correction codes","Decoding","Reliability","Dispersion","Encoding","Systematics","Memory management"
  • Publisher
    ieee
  • Conference_Titel
    VLSI and System-on-Chip, 2012 (VLSI-SoC), IEEE/IFIP 20th International Conference on
  • Print_ISBN
    978-1-4673-2658-2
  • Type

    conf

  • DOI
    10.1109/VLSI-SoC.2012.7332119
  • Filename
    7332119