DocumentCode
3694115
Title
ARRA: Application-guided reliability-enhanced registerfile architecture for embedded processors
Author
Hamed Tabkhi;Gunar Schirner
Author_Institution
Department of Electrical and Computer Engineering, Northeastern University, USA
fYear
2012
Firstpage
299
Lastpage
302
Abstract
In this paper, we introduce an Application-guided Reliability-enhanced Register file Architecture (ARRA) to improve the reliability of RF in embedded processors. ARRA proposes a RF micro-architecture which is guided by binary instrumentation for run-time register mirroring. Our experimental results on an ARRA-enhanced Blackfin processor present that on average the power overhead of ARRA is 70% less than that of a partially-ECC-protected RF, while ARRA reduces RF Vulnerability Factor from 35% to 6.9%, and can correct up to three bit-flips errors.
Keywords
"Registers","Radio frequency","Program processors","Error correction","Reliability engineering","Instruments"
Publisher
ieee
Conference_Titel
VLSI and System-on-Chip, 2012 (VLSI-SoC), IEEE/IFIP 20th International Conference on
Print_ISBN
978-1-4673-2658-2
Type
conf
DOI
10.1109/VLSI-SoC.2012.7332122
Filename
7332122
Link To Document