Hardware based design and performance evaluation of a tree based RFID anti-collision protocol

The growing concern in tracking, identification and localization systems has turn Radio Frequency Identification (RFID) technology into a mainstream in scientific research. In this technology, the phenomena known as the tag collision problem is becoming increasingly important, since it leads to a wastage of bandwidth, energy, and an increase in identification delay. There- fore, anti-collision protocols are required to mitigate collisions. Tree based protocols constitute one of the two main types of Radio Frequency IDentification (RFID) anti-collision protocols. Inside this group, Collision Tree (CT) protocol constitutes a representa- tive strategy, since some other strategies are based on it. The focus of this work is to design and evaluate with VHDL the CT tag´s chip design in order to extract the number of clock cycles required by the reader to identify a set of tags. A stability analysis is also per- formed. Simulations results show that the total number of clock cycles is linearly influenced by the tag´s ID length.