• DocumentCode
    3694849
  • Title

    Logic/memory hybrid 3D sequentially integrated circuit using low thermal budget laser process

  • Author

    Chih-Chao Yang;Tung-Ying Hsieh;Wen-Hsien Huang;Tsung-Ta Wu;Hsing-Hsiang Wang;Chang-Hong Shen;Ming-Hsuan Kao;Wen-Kuan Yeh;Meng-Fan Chang;Meng-Chyi Wu;Jia-Min Shieh

  • Author_Institution
    National Nano Device Laboratories, No.26, Prosperity Road 1, Hsinchu 30078, Taiwan
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    High performance 3D sequentially stackable nanowire FETs and non-volatile memories (NVMs) with threshold voltage engineering and driving current boosting technologies were demonstrated by using low thermal budget nanosecond laser crystallization and laser activation technologies. The local heating laser process without damaging the underlying device/circuit realizes the across-layer and in-layer integration of high-speed 3ps logic circuits and 1-T 100ns plasma-MONOS NVMs as well as low driving-voltage 6T SRAMs with static noise margin (SNM) of 280 mV. Such logic/memory hybrid 3D sequentially integrated circuit provides power efficient computing and storage. Moreover, the monolithically stacking of Si thin-film energy harvester envisions lower power and low cost 3D+IC for internet of things.
  • Keywords
    "Three-dimensional displays","Logic gates","Silicon","Nonvolatile memory","Integrated circuits","Crystallization","Nanoscale devices"
  • Publisher
    ieee
  • Conference_Titel
    SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/S3S.2015.7333506
  • Filename
    7333506