DocumentCode :
3694856
Title :
CMOS-compatible FDSOI bipolar-enhanced tunneling FET
Author :
Peng Zhang;J. Wan;A. Zaslavsky;S. Cristoloveanu
Author_Institution :
Department of Physics and School of Engineering, Brown University, Providence, RI 02912, USA
fYear :
2015
Firstpage :
1
Lastpage :
3
Abstract :
We propose and simulate a bipolar-enhanced tunneling field-effect transistor (BET-FET) with a lateral layout that is fully FDSOI compatible. Simulations calibrated to experimental TFET data show a high on-current of ION ∼ 260 μA/μm at VDD = 1 V and a subthreshold swing (SS) well below 60 mV/dec over 7 decades of drain current. The mechanism involves the combination of gate-controlled sharp TFET switching with current gain from a Si/Si1-xGex heterojunction bipolar transistor (HBT). An electrostatically controlled BET-FET variant with a local buried gate is also simulated.
Keywords :
"Tunneling","Transistors","Switches","Erbium"
Publisher :
ieee
Conference_Titel :
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
Type :
conf
DOI :
10.1109/S3S.2015.7333513
Filename :
7333513
Link To Document :
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