Silicon-on-Ferroelectric-Insulator — A comparative analysis of the partially and fully depleted devices

Recently, Silicon-on-Ferroelectric Insulator FET (SOFFET) device was proposed as new sub-60mV/decade structure. In this work, we present a comparative analysis of the electrical characteristics and the performance of the partially depleted (PD) and the fully depleted (FD) versions of the proposed SOFFET. This comparison is based on simplified capacitance models. These models are used to analyze and study the dependence of the subthreshold swing on the material and geometric parameters of the device. It is demonstrated that by carefully optimizing the thickness of the ferroelectric film, dielectric property of the insulator, and the channel thickness, the subthreshold swing and the threshold voltage can be lowered in both PD and FD versions of the SOFFET. It is observed that FD-SOFFET provides lower body factor and subthreshold swing compared to the PD-SOFFET.