DocumentCode
3694859
Title
Minimum-energy point design in FDSOI Regular-Vt
Author
Lauri Koskinen;Markus Hiienkari;Matthew Turnquist;Philippe Flatresse
Author_Institution
University of Turku, Technology Research Center, Turku, Finland
fYear
2015
Firstpage
1
Lastpage
2
Abstract
FDSOI has been shown to achieve extremely high performance at low operating voltages: a use-case extremely well suited for applications such as mobile processing. In IoT and Dark Silicon, use cases with extremely low application active times per standby times can be found. Investigated here are the turnover points where the higher threshold voltage and longer channel length options of FDSOI should be used. It was found that for activity factors below 3.2% to 0.5%, depending on the voltage, the Regular VT option of FDSOI should be used.
Keywords
"Transistors","Libraries","Logic gates","Threshold voltage","Ring oscillators","Standards","Silicon"
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
Type
conf
DOI
10.1109/S3S.2015.7333516
Filename
7333516
Link To Document