Title :
Transconductance hump in vertical gate-all-around tunnel-FETs
Author :
F. S. Neves;P. G. D. Agopian;J. A. Martino;B. Cretu;A. Vandooren;R. Rooyackers;E. Simoen;A. Thean;C. Claeys
Author_Institution :
University of Sao Paulo, Sao Paulo, Brazil
Abstract :
This work presents an experimental analysis of the transconductance in vertical Ge source gate-all-around Tunnel-FETs for temperatures ranging from 100K to 400K. It was observed that the gm hump is related to the different conduction mechanisms which can be explained by the different temperature impact for each mechanism. This effect was also studied using numerical simulations.
Keywords :
"Transistors","Logic devices","Nanoscale devices","Silicon","Physics"
Conference_Titel :
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
DOI :
10.1109/S3S.2015.7333523
