Title :
A soft error tolerant 4T gain-cell featuring a parity column for ultra-low power applications
Author :
Robert Giterman;Adam Teman;Lior Atias;Alexander Fish
Author_Institution :
Faculty of Engineering, Bar-Ilan University, Ramat Gan, Israel
Abstract :
Embedded memories often constitute over 50% of the total silicon area and are the main consumer of static power in ultra-low power (ULP) applications. Operation at sub-threshold supply voltages can significantly reduce the power dissipation of memory arrays, however it also results in lower noise margins and much higher susceptibility to radiation effects, such as soft errors or single event upsets (SEU).
Keywords :
"Junctions","Transistors","Arrays","Power demand","Single event upsets","SRAM cells"
Conference_Titel :
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
DOI :
10.1109/S3S.2015.7333525