DocumentCode :
3694886
Title :
Special characterization techniques for advanced FDSOI process
Author :
S. Cristoloveanu;M. Bawedin;I. Ionica
Author_Institution :
IMEP-LAHC, Grenoble Institute of Technology, Minatec, Grenoble, France
fYear :
2015
Firstpage :
1
Lastpage :
2
Abstract :
Nanosize SOI materials and devices feature two oxides, three interfaces and two possible channels, more or less overlapped. This complexity cannot be addressed with conventional characterization methods developed for bulk-Si devices. We review appropriate techniques efficient in FDSOI structures. The latest advances in pseudo-MOSFET method are described and selected examples illustrate the properties of recent SOI materials (UTBB, GeOI, sSOI, etc). The gated diode is a powerful characterization tool that complements the sophisticated MOSFET methods (split capacitance, current transients, noise, magnetoresistance, etc.). We discuss recent data for FDSOI as well as more unusual results induced by coupling and floating body mechanisms. Size effects (ultrathin film and short-channel) are shown to affect the interpretation of mobility and threshold voltage in FDSOI.
Keywords :
"Logic gates","MOSFET","Couplings","Films","Capacitance","Threshold voltage","Semiconductor device measurement"
Publisher :
ieee
Conference_Titel :
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015 IEEE
Type :
conf
DOI :
10.1109/S3S.2015.7333543
Filename :
7333543
Link To Document :
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