0.5-V 350-ps 28-nm FD-SOI SRAM array with dynamic power-supply 5T cell

To achieve high-speed 0.5-V SRAMs, a dynamic power-supply 5T cell, and a multi-divided array with selectively-boosted 5T-cell power lines are proposed. Layout and post-layout simulation with a 28-nm planar-FD-SOI MOSFET reveal that a 4-kb array in a 128-kb core using the proposals operates at 350-ps cycle with x6 faster and x13 lower power than the counterpart 6T-cell array, while maintaining a small leakage current.