Design insights for reliable energy efficient OxRAM-based flip-flop in 28nm FD-SOI

This paper investigates the design architecture and the optimum resistance state values for high-endurance, high-yield energy-efficient OxRAM-based non-volatile flip-flops (NVFF) for ultra-low power applications in 28nm FD-SOI. Silicon measurements demonstrate that a low programming current improves endurance, but at the expense of a reduced memory window (ROFF/RON). Statistical analyses show that the scaling limitation of the NVFF operating voltage in restore mode can be overcome with a narrow memory window by using a current-based design solution. Low variability of the FD-SOI enables to operate down-to 0.7V with more than 10⁸ of endurance cycles.