• DocumentCode
    3695707
  • Title

    Research on the key technology of 1553B bus test system

  • Author

    Shuiqiang Pei;Jin Xiao;Xiaoguang Hu;Dan Sun

  • Author_Institution
    State Key Laboratory of Virtual Reality Technology and Systems, Beihang University, Beijing, 100191, China
  • fYear
    2015
  • fDate
    6/1/2015 12:00:00 AM
  • Firstpage
    961
  • Lastpage
    965
  • Abstract
    The 1553B bus system is widely used in the aerospace systems with its characters of high efficiency and real time. This paper takes BU-61580 as an example and introduces in detail the information transmitting from the host computer to the 1553B bus. In the bus information transmission, the host processor configures the bus instruction first. Then the DSP unpacks the information and transmits it to the FPGA. Finally by the configuration of the BU-61580, the 1553B bus could work on the BC, RT and BM modes. In the process of bus information upload, the FPGA takes out the information from the ram region of the BU-61580 and stores it in the buffer zone. Then the DSP takes out the information from the buffer zone through the XINTF bus and delivers it to the host processor. At last, the host processor could show the bus data in the display. The system finally completes the function of 1553B bus test system well.
  • Keywords
    "Digital signal processing","Field programmable gate arrays","Random access memory","Monitoring","Protocols","Registers","Military standards"
  • Publisher
    ieee
  • Conference_Titel
    Industrial Electronics and Applications (ICIEA), 2015 IEEE 10th Conference on
  • Type

    conf

  • DOI
    10.1109/ICIEA.2015.7334382
  • Filename
    7334382