Modeling and analysis of defects in through silicon via channel for non-invasive fault isolation

Through silicon via (TSV) based 3DIC allows lower power consumption, higher system bandwidth, and smaller form factor of electronic devices. In order to design a system with tens of thousands of I/Os, the fabrication process has to be controlled with extremely high precision. With less than 10 micrometers of diameter and several tens of micrometers of pitch, TSVs are susceptible to mechanical and thermal stress. In this paper, we present a non-invasive fault isolation method for high-speed TSV channel using electrical characteristic analysis. A ground signal ground (GSG) type TSV channel is designed and simulated with 3D FEM solver. The structure is analyzed by equivalent circuit model results, which is compared with the results from 3D FEM solver. By analyzing the S-parameter curves, open and short defects are successfully detected and isolated.