DocumentCode
3695922
Title
A holistic view of chip-level thermal architecture from heterogeneous stacked dice to system level in telecoms applications
Author
Gamal Refai-Ahmed;Ivor Barber;Anthony Torza;Brian Philofsky
Author_Institution
Xilinx Inc., San Jose, CA, USA
fYear
2015
Abstract
Silicon Interconnect Technology (SSIT) enables superior feature integration beyond what is possible in monolithic technology with only a Moore´s Law feature shrink as well as heterogeneous feature integration of disparate dice (e.g. memories, RF DAC/ADCs, optical interfaces, customer ASICs etc.). In a Telecom environment, this superior feature density enables new applications, but also presents higher thermal density to the Thermal Engineer. To properly utilize these benefits, a Thermal Engineer must take a holistic approach to thermal architecture that simultaneously addresses system goals of Cost, Performance, Weight, Size, Power and Performance. This paper will discuss the critical parameters which impact thermal architecture, followed by Challenges in Indoor and Outdoor Telecom Systems from device and system perspectives and finally will show the impact of combining network utilization and heterogeneous load in the user´s environment.)
Keywords
"Electronic packaging thermal management","Telecommunications","Thermal engineering","Thermal loading","Junctions","Three-dimensional displays","System integration"
Publisher
ieee
Conference_Titel
3D Systems Integration Conference (3DIC), 2015 International
Type
conf
DOI
10.1109/3DIC.2015.7334615
Filename
7334615
Link To Document