A hardware-in-the-loop SCADA testbed

USF Smart Grid Power System Lab (SPS) has developed an hardware-in-loop (HIL) SCADA testbed. This paper describes several communication/control architectures of the testbed with different hardware/software combinations. This testbed will be used to test energy management schemes, power grid cyber attack and mitigation strategies. Phasor Measurement Units (PMUs) synchronized with the common GPS reference signal are used to capture data from a real smart grid system as well as a simulated power network in Opal-RT´s real-time simulator. Captured data will be sent to OSIsoft´s PI-Server database via different protocols.