DocumentCode
3697202
Title
Cache Filter Method Based on DRAM Access Frequency to Improve System Performance
Author
Nagi Mekhiel
Author_Institution
Dept. of Electr. &
fYear
2015
Firstpage
1607
Lastpage
1610
Abstract
Spatial and temporal localities used in keeping references in cache is limited by the behavior of applications. Many applications that lack these localities, and have high frequency of use of accesses results in a degradation of system performance under the conventional cache design. The proposed method, tracks most frequently used references by dynamically monitoring the accesses to main memory and allows them to be in the cache while rejecting less frequently used accesses. This reduces eviction rate and thereby improves the overall performance.
Keywords
"Random access memory","Registers","Monitoring","Memory management","Hardware","Software","System performance"
Publisher
ieee
Conference_Titel
High Performance Computing and Communications (HPCC), 2015 IEEE 7th International Symposium on Cyberspace Safety and Security (CSS), 2015 IEEE 12th International Conferen on Embedded Software and Systems (ICESS), 2015 IEEE 17th International Conference on
Type
conf
DOI
10.1109/HPCC-CSS-ICESS.2015.55
Filename
7336398
Link To Document