• DocumentCode
    3697331
  • Title

    An improved unipolar CMOS with elevated body and spacer for low-power application

  • Author

    Wei-Han Lee;Jyi-Tsong Lin;Kai-Cheng Juang;Ting-Chung Chang;Chih-Kai Huang;Chien-Chia Lai;Bo-Cheng Yan;Yong-Huang Lin

  • Author_Institution
    Department of Electrical Engineering, National Sun Yat Sen University, 70 Lien-Hai Rd. Kaohsiung 80424, Taiwan, R.O.C.
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    In this paper, we present a novel non-classical NMOS transistor with elevated body and spacer to replace the conventional PMOS for CMOS circuits. By calibrating the parameters from the real measurement for the simulations, the novel non-classical NMOS transistor shows a PMOS-like behavior. The proposed unipolar CMOS can reduce the propagation delay time (TP) and power dissipation (PD). The simulation results show that the TP and PD of the unipolar CMOS circuit are 46% and 20% lower than the conventional CMOS inverter. It has been confirmed that the proposed unipolar CMOS can work well for all NOR logic gates, NAND logic gates, ring oscillator and static random-access memory (SRAM) under 0.5V power supply. Thus, the unipolar CMOS is expected as a candidate for low-power application in near future CMOS technology.
  • Keywords
    "CMOS integrated circuits","Logic gates","MOSFET","Inverters","CMOS technology","Propagation delay","Random access memory"
  • Publisher
    ieee
  • Conference_Titel
    Energy Efficient Electronic Systems (E3S), 2015 Fourth Berkeley Symposium on
  • Type

    conf

  • DOI
    10.1109/E3S.2015.7336806
  • Filename
    7336806