Title :
Compact 160-GHz amplifier with 15-dB peak gain and 41-GHz 3-dB bandwidth
Author :
S. Hara;K. Katayama;K. Takano;I. Watanabe;N. Sekine;A. Kasamatsu;T. Yoshida;S. Amakawa;M. Fujishima
Author_Institution :
Advanced ICT Research Institute, National Institute of Information and Communications Technology, Japan
fDate :
5/1/2015 12:00:00 AM
Abstract :
This paper presents a compact wideband amplifier at 160 GHz in 40-nm CMOS. Typical wideband amplifier design requires higher-order matching networks and more gain stages, both of which demand larger die area. The presented 8-stage amplifier uses a compact “fishbone” layout technique, and its core size is as small as 190 × 123 µm2. A small-signal gain of 15 dB at 160 GHz and a 3-dB bandwidth of 41 GHz are achieved. It consumes 117 mW from a 0.9 V voltage supply.
Keywords :
"Gain","CMOS integrated circuits","Bandwidth","Layout","Broadband amplifiers","CMOS technology","Transmission line measurements"
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
DOI :
10.1109/RFIC.2015.7337691
