DocumentCode :
3697879
Title :
A self-interference cancelling front-end for in-band full-duplex wireless and its phase noise performance
Author :
Dirk-Jan van den Broek;Eric A.M. Klumperink;Bram Nauta
Author_Institution :
IC-Design Group, University of Twente, The Netherlands
fYear :
2015
fDate :
5/1/2015 12:00:00 AM
Firstpage :
75
Lastpage :
78
Abstract :
This paper describes a frequency-agile RF front-end in 65nm CMOS targeting short-range full-duplex wireless communication. Complementing previous work on a self-interference cancelling receiver, this work describes the co-integrated transmitter and reports the phase noise advantages of using correlated clock resources to clock all up- and downconverters present in the system. The hardware is capable of frequency-agile operation from 0.15 to 3.5GHz carrier frequency. Measurements at 2.5 GHz indicate that the RX noise floor is only 1 dB degraded by phase noise when operated from a commercial PLL with ∼ −38 dBc phase noise.
Keywords :
"Phase noise","Silicon","Floors","Clocks","Wireless communication","Noise measurement","Receivers"
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
Type :
conf
DOI :
10.1109/RFIC.2015.7337708
Filename :
7337708
Link To Document :
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