• DocumentCode
    3698512
  • Title

    A 0.622–10Gb/s inductorless adaptive linear equalizer with spectral tracking for data rate adaptation in 0.13-μm CMOS

  • Author

    Sagar Ray;Mona M. Hella

  • Author_Institution
    ECSE Department, Rensselaer Polytechnic Institute, Troy, NY 12180, USA
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper presents an adaptive equalizer based on dual-loop balancing technique and a third order nested feedback equalizing filter to achieve data rate up to 10Gb/s without using inductors. A spectral balancing circuit adjusts the equalizer boost, while a second servo loop automatically tracks the data rate using self-calibration and re-tunes the filters for optimal equalization. Third order nested feedback is introduced in the equalizing filters to compensate for ∼15dB channel loss for a highest data rate of 10Gb/s. Implemented in IBM 0.13-μm CMOS technology, the equalizer maintains an eye opening of 0.26, 0.44 and 0.5UI with BER<10−12 for 5 Gb/s, 8.5Gb/s and 10Gb/s PRBS31 inputs, respectively. The chip dissipates 130 mW from a 1.2V power supply, while occupying an active area of 0.34 mm2.
  • Keywords
    "Adaptive equalizers","CMOS integrated circuits","CMOS technology","Bit error rate","Voltage control","Frequency control"
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference (CICC), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/CICC.2015.7338375
  • Filename
    7338375