DocumentCode
3698541
Title
An injection locked PLL for power supply variation robustness using negative phase shift phenomenon of injection locked frequency divider
Author
Dongil Lee;Taeho Lee;Yong-Hun Kim;Young-Ju Kim;Lee-Sup Kim
Author_Institution
KAIST, 291 Daehak-ro, Yuseong-gu, Daejeon, Republic of Korea
fYear
2015
Firstpage
1
Lastpage
4
Abstract
This paper presents a 2 GHz injection-locked PLL (ILPLL) with an injection-locked frequency divider (ILFD). Using a negative phase shift phenomenon of the ILFD, injection timing can be calibrated without a delay line. As a result, the proposed ILPLL achieves a simple background injection timing calibration for robustness of power supply variation. The test core has been fabricated in 65nm CMOS process consuming 3.74mW at 0.9V supply voltage.
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2015 IEEE
Type
conf
DOI
10.1109/CICC.2015.7338404
Filename
7338404
Link To Document