• DocumentCode
    3698581
  • Title

    Custom 6-R, 2- or 4-W multi-port register files in an ASIC SOC with a DVFS window of 0.5 V, 130 MHz to 0.96 V, 3.2 GHz in a 28-nm HKMG CMOS technology

  • Author

    Henry Hsieh;Sang H. Dhong;Cheng-Chung Lin;Ming-Zhang Kuo;Kuo-Feng Tseng;Ping-Lin Yang;Kevin Huang;Min-Jer Wang;Wei Hwang

  • Author_Institution
    Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    We describe custom 6R, 2/4W general-purpose register files (GRF) in an ASIC-based SOC implemented in a N28 CMOS technology, which has roughly a 2∼3 X smaller area, 2 X faster speed, and 5 X lower power than a logic-synthesized version. Synthesized and custom GRFs also have a different read behavior from static and dynamic circuitry used, respectively. This is addressed by modifying a bypass control block. Hardware showed a DVFS window of 0.5 V @circuit, 130 MHz to 0.96 V, 3.2 GHz.
  • Keywords
    "Registers","Wiring","System-on-chip","Latches","Transistors","CMOS integrated circuits"
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference (CICC), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/CICC.2015.7338445
  • Filename
    7338445