DocumentCode :
3698629
Title :
A 12b ENOB, 2.5MHz-BW, 4.8mW VCO-based 0–1 MASH ADC with direct digital background nonlinearity calibration
Author :
Kareem Ragab;Nan Sun
Author_Institution :
The University of Texas at Austin, Austin, TX 78712
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
A direct digital background calibration technique to correct nonlinearity errors in VCO-based 0–1 MASH ΣΔ ADCs is presented. The proposed technique altogether corrects VCO gain error, nonlinearity, and capacitor mismatch of the residue generating DAC. It improves SNDR of the prototype ADC from 60dB to 73.4dB in 2.5MHz signal bandwidth. The ADC consumes 4.8mW from 1.8V supply in 180nm CMOS. The measured convergence time is only 64ms.
Keywords :
"Calibration","Voltage-controlled oscillators","Convergence","Multi-stage noise shaping","Quantization (signal)","Gain","Transfer functions"
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2015 IEEE
Type :
conf
DOI :
10.1109/CICC.2015.7338494
Filename :
7338494
Link To Document :
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