Bi-channel PAL sync signal switcher based on CPLD

The normal display of the video signal depends on the video sync signal. In the pragmatic applications, failing to display of the video signal usually subjects to the loss of the sync signal, and affects the regular production. And the excessive long transmission lines debilitate the video sync signals, which results in the video signal displaying abnormally. Bi-channel PAL sync signal switcher discussed in this paper is based on Complex Programmable Logic Devices (CPLD) and generates PAL timing by CPLD programming. It is used to solve the problem that the video is unable to display for the loss of video sync signal. Meanwhile, the three-state gates are used to overcome the weakness of the load driving ability.