DocumentCode :
3701250
Title :
Performance and DSP complexity evaluation of a 112-Gbit/s PAM-4 transceiver employing a 25-GHz TOSA and ROSA
Author :
Nebojsa Stojanovic;Zhang Qiang;Cristian Prodaniuc;Fotini Karinou
Author_Institution :
Huawei Technologies Duesseldorf GmbH, European Research Center, 80992, Munich, Germany
fYear :
2015
Firstpage :
1
Lastpage :
3
Abstract :
We experimentally demonstrate Tx DSP-free 112-Gbit/s PAM-4 transmission over 20 km SMF using commercially available 1298 nm 25-GHz TOSA and ROSA devices. Superior performance is achieved by using timing recovery supported DSP at the receiver.
Keywords :
"Digital signal processing","Maximum likelihood estimation","Jitter","Bit error rate","Clocks","Complexity theory","Timing"
Publisher :
ieee
Conference_Titel :
Optical Communication (ECOC), 2015 European Conference on
Type :
conf
DOI :
10.1109/ECOC.2015.7341947
Filename :
7341947
Link To Document :
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