Low leakage CNTFET full adders

As the technology scales down to 32nm or below, the leakage power starts dominating the total power. Reduction of this leakage problem is the major problem, today´s CMOS technology is facing. Hence researchers are looking for alternate technologies. The Carbon Nanotubes FET (CNTFET) is found to be a most promising device that becomes alternative or replacement for present CMOS technology. As the full adder is one of the major units of the ALU, it plays important role in speed and power consumption. In this paper several CNTFET full adder circuits are designed by applying different leakage power reduction techniques to reduce leakage power and to enhance the performance of the full adder circuit. Finally the full adder circuit with the proposed stacked single transistor leakage feedback technique was designed and proved that the proposed stacked single transistor leakage feedback CNTFET Full adder will reduce more leakage power with the same performance compared to all other techniques.