A small-insertion-loss-variation phase shifter with optimized body-floating transistors

Body-floating technique applied to n-type metal-oxide-semiconductor (nMOS) transistors and transistor-size optimization are studied for minimizing the insertion-loss variation in phase shifters. A CMOS radio frequency integrated circuit (RFIC) 4-bit digital phase shifter designed using a 0.18-μm SiGe BiCMOS technology with low insertion-loss variation between phase states is designed to verify the concepts. The phase shifter shows a measured insertion-loss variation of 13 ± 2.5 dB across different phase states at 24 GHz and an input/output return loss better than 10 dB over 21 to 27 GHz.