A prediction method of heat generation in the silicon substrate for 3-D ICs

Through-silicon via (TSV) based 3-D ICs provide a promising solution for miniaturizing chips. However, thermal issue in 3-D ICs cannot be ignored. In this paper, we proposed a method based on 3-D transmission line matrix (3-D TLM) method to calculate heat generation in the lossy silicon substrate caused by TSV induced electrical field. Pseudo random bit sequences (PRBS) at different bit rates are fed into TSVs to simulate the transmitted digital signal. The influence of TSV arrangements and TSV oxide thickness to the heat generation are also investigated in time-domain. With the help of this method, the generation and distribution of heat in the silicon substrate can be predicted.