DocumentCode :
3706362
Title :
Design and performance of nonvolatile SRAM cells based on pseudo-spin-FinFET architecture
Author :
Y. Shuto;S. Yamamoto;S. Sugahara
Author_Institution :
Imaging Science and Engineering Laboratory, Tokyo Institute of Technology, Yokohama, Japan., Kanagawa Academy of Science and Technology, Kawasaki, Japan
fYear :
2014
fDate :
6/1/2014 12:00:00 AM
Firstpage :
1
Lastpage :
2
Abstract :
In this paper, we computationally investigated the operation and performance of NV-SRAM cells based on the PS-FinFET architecture. The NV-SRAM cells were carefully designed by taking into account various static noise margins (SNMs) (not only for normal SRAM operations but also for nonvolatile store and restore operations). The NVPG ability (energy performance) of the NV-SRAM cells was also investigated.
Keywords :
"Computer architecture","Microprocessors","Yttrium","FinFETs","Computer integrated manufacturing","Random access memory","Magnetic tunneling"
Publisher :
ieee
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
Print_ISBN :
978-1-4799-5676-0
Type :
conf
DOI :
10.1109/SNW.2014.7348599
Filename :
7348599
Link To Document :
بازگشت