Title :
Dual-material gate schottky barrier UTB DG MOSFETs with Ge and III-V channel
Author :
W. Choi;J. Lee;M. Shin
Author_Institution :
Dept. Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, Rep. of Korea
fDate :
6/1/2014 12:00:00 AM
Abstract :
Dual-material gate (DMG) Schottky Barrier (SB) MOSFETs with Si, Ge, and III-V channel are investigated by full quantum mechanical simulations. We find that DMG can be a significant performance booster which can overcome the limitations of SB MOSFETs. By applying DMG, on-state currents of Si, Ge, and GaSb channel devices increase by 3 to 4 times and ambipolar currents of InAs channel devices are suppressed below 0.1 μA/μm, resulting in ION/IOFF of greater than 103.
Keywords :
"Logic gates","MOSFET","Silicon","Metals","Tunneling","Schottky barriers","Performance evaluation"
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2014 IEEE
Print_ISBN :
978-1-4799-5676-0
DOI :
10.1109/SNW.2014.7348614
