DocumentCode :
3708935
Title :
FPGA Implementation of a Three-Phase PLL and a Space Vector Modulator of a Matrix Converter for Future Electric Vehicles
Author :
Francisco E. Rodarte-Gutierrez;Ismael Araujo-Vargas;Jazmin Ramirez Hernandez
Author_Institution :
Seccion de Estudios de Posgrado e Investig., Inst. Politec. Nac., Mexico City, Mexico
fYear :
2015
Firstpage :
1
Lastpage :
8
Abstract :
The present work describes the FPGA implementation of a PLL synchronization method and a Space Vector Modulation (SVM) for a Matrix Converter destined to be used in future electric vehicles. The use of this implementation technique has three advantages: first, a rotating frame transformation is used as a phase detector; the implementation of the PLL and SVM is realized in a low-cost FPGA; and third, the implementation allows both faster processing time and switching action of a Master Digital Signal Processor (DSP) for other tasks, such as internal and external control loops of the power converter and parallel operation of control blocks. Simulation and experimental results are shown along the paper to verify the correct operation of the FPGA implementation, showing that the system PLL response is accurate to its ideal design with minimal delay effects.
Keywords :
"Field programmable gate arrays","Detectors","Phase locked loops","Matrix converters","Synchronization","Space vector pulse width modulation"
Publisher :
ieee
Conference_Titel :
Vehicle Power and Propulsion Conference (VPPC), 2015 IEEE
Type :
conf
DOI :
10.1109/VPPC.2015.7352949
Filename :
7352949
Link To Document :
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