DocumentCode :
3710309
Title :
On interleaver design for BICM system with low error-floors
Author :
Sangha Lee;Jeongseok Ha;Jaeyoon Lee
Author_Institution :
Department of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, 34141, Korea
fYear :
2015
Firstpage :
765
Lastpage :
769
Abstract :
In this paper, we propose a design rule of a modified quasi-cyclic structure for bit-interleaved coded modulation with iterative decoding (BICM-ID). The proposed structure is especially favorable for low-complexity hardware implementation. In addition, it will be shown that the proposed structure effectively removes low-weight codewords, which in turn greatly improves error-floor behaviors as compared to quasi-cyclic interleaver.
Keywords :
"Encoding","Hardware","Frequency shift keying","Algorithm design and analysis","Error correction codes","Wireless communication"
Publisher :
ieee
Conference_Titel :
Information and Communication Technology Convergence (ICTC), 2015 International Conference on
Type :
conf
DOI :
10.1109/ICTC.2015.7354659
Filename :
7354659
Link To Document :
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